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작성자 키트 작성일2017-08-21 16:14 조회1,105회 댓글0건첨부파일
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먼저 소스에서 타이머 주기를 16.3ms로 고치고
TWI 주파수를 400KHz로 바꾸는등 일부 수정했습니다.
//// mahony filter//#include <mega128.h>#include <delay.h>#include <math.h>#include <stdlib.h>#include <stdio.h>#include <string.h>//#define TWINT 0x80#define TWEA 0x40#define TWSTA 0x20#define TWSTO 0x10#define TWWC 0x08#define TWEN 0x04#define TWIE 0x01//// TW_MT_xxx - master transmitter// TW_MR_xxx - master receiver// TW_ST_xxx - slave transmitter// TW_SR_xxx - slave receiver//#define TW_START 0x08#define TW_REP_START 0x10#define TW_MT_SLA_ACK 0x18#define TW_MT_SLA_NACK 0x20#define TW_MT_DATA_ACK 0x28#define TW_MT_DATA_NACK 0x30#define TW_MT_ARB_LOST 0x38#define TW_MR_ARB_LOST 0x38#define TW_MR_SLA_ACK 0x40#define TW_MR_SLA_NACK 0x48#define TW_MR_DATA_ACK 0x50#define TW_MR_DATA_NACK 0x58#define TW_ST_SLA_ACK 0xA8#define TW_ST_ARB_LOST_SLA_ACK 0xB0#define TW_ST_DATA_ACK 0xB8#define TW_ST_DATA_NACK 0xC0#define TW_ST_LAST_DATA 0xC8#define TW_SR_SLA_ACK 0x60#define TW_SR_ARB_LOST_SLA_ACK 0x68#define TW_SR_GCALL_ACK 0x70#define TW_SR_ARB_LOST_GCALL_ACK 0x78#define TW_SR_DATA_ACK 0x80#define TW_SR_DATA_NACK 0x88#define TW_SR_GCALL_DATA_ACK 0x90#define TW_SR_GCALL_DATA_NACK 0x98#define TW_SR_STOP 0xA0#define TW_NO_INFO 0xF8#define TW_BUS_ERROR 0x00//#define MPU6050_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD#define MPU6050_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD#define MPU6050_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD#define MPU6050_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN#define MPU6050_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN#define MPU6050_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN#define MPU6050_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS#define MPU6050_RA_XA_OFFS_L_TC 0x07#define MPU6050_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS#define MPU6050_RA_YA_OFFS_L_TC 0x09#define MPU6050_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS#define MPU6050_RA_ZA_OFFS_L_TC 0x0B#define MPU6050_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR#define MPU6050_RA_XG_OFFS_USRL 0x14#define MPU6050_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR#define MPU6050_RA_YG_OFFS_USRL 0x16#define MPU6050_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR#define MPU6050_RA_ZG_OFFS_USRL 0x18#define MPU6050_RA_SMPLRT_DIV 0x19#define MPU6050_RA_CONFIG 0x1A#define MPU6050_RA_GYRO_CONFIG 0x1B#define MPU6050_RA_ACCEL_CONFIG 0x1C#define MPU6050_RA_FF_THR 0x1D#define MPU6050_RA_FF_DUR 0x1E#define MPU6050_RA_MOT_THR 0x1F#define MPU6050_RA_MOT_DUR 0x20#define MPU6050_RA_ZRMOT_THR 0x21#define MPU6050_RA_ZRMOT_DUR 0x22#define MPU6050_RA_FIFO_EN 0x23#define MPU6050_RA_I2C_MST_CTRL 0x24#define MPU6050_RA_I2C_SLV0_ADDR 0x25#define MPU6050_RA_I2C_SLV0_REG 0x26#define MPU6050_RA_I2C_SLV0_CTRL 0x27#define MPU6050_RA_I2C_SLV1_ADDR 0x28#define MPU6050_RA_I2C_SLV1_REG 0x29#define MPU6050_RA_I2C_SLV1_CTRL 0x2A#define MPU6050_RA_I2C_SLV2_ADDR 0x2B#define MPU6050_RA_I2C_SLV2_REG 0x2C#define MPU6050_RA_I2C_SLV2_CTRL 0x2D#define MPU6050_RA_I2C_SLV3_ADDR 0x2E#define MPU6050_RA_I2C_SLV3_REG 0x2F#define MPU6050_RA_I2C_SLV3_CTRL 0x30#define MPU6050_RA_I2C_SLV4_ADDR 0x31#define MPU6050_RA_I2C_SLV4_REG 0x32#define MPU6050_RA_I2C_SLV4_DO 0x33#define MPU6050_RA_I2C_SLV4_CTRL 0x34#define MPU6050_RA_I2C_SLV4_DI 0x35#define MPU6050_RA_I2C_MST_STATUS 0x36#define MPU6050_RA_INT_PIN_CFG 0x37#define MPU6050_RA_INT_ENABLE 0x38#define MPU6050_RA_DMP_INT_STATUS 0x39#define MPU6050_RA_INT_STATUS 0x3A#define MPU6050_RA_ACCEL_XOUT_H 0x3B#define MPU6050_RA_ACCEL_XOUT_L 0x3C#define MPU6050_RA_ACCEL_YOUT_H 0x3D#define MPU6050_RA_ACCEL_YOUT_L 0x3E#define MPU6050_RA_ACCEL_ZOUT_H 0x3F#define MPU6050_RA_ACCEL_ZOUT_L 0x40#define MPU6050_RA_TEMP_OUT_H 0x41#define MPU6050_RA_TEMP_OUT_L 0x42#define MPU6050_RA_GYRO_XOUT_H 0x43#define MPU6050_RA_GYRO_XOUT_L 0x44#define MPU6050_RA_GYRO_YOUT_H 0x45#define MPU6050_RA_GYRO_YOUT_L 0x46#define MPU6050_RA_GYRO_ZOUT_H 0x47#define MPU6050_RA_GYRO_ZOUT_L 0x48#define MPU6050_RA_EXT_SENS_DATA_00 0x49#define MPU6050_RA_EXT_SENS_DATA_01 0x4A#define MPU6050_RA_EXT_SENS_DATA_02 0x4B#define MPU6050_RA_EXT_SENS_DATA_03 0x4C#define MPU6050_RA_EXT_SENS_DATA_04 0x4D#define MPU6050_RA_EXT_SENS_DATA_05 0x4E#define MPU6050_RA_EXT_SENS_DATA_06 0x4F#define MPU6050_RA_EXT_SENS_DATA_07 0x50#define MPU6050_RA_EXT_SENS_DATA_08 0x51#define MPU6050_RA_EXT_SENS_DATA_09 0x52#define MPU6050_RA_EXT_SENS_DATA_10 0x53#define MPU6050_RA_EXT_SENS_DATA_11 0x54#define MPU6050_RA_EXT_SENS_DATA_12 0x55#define MPU6050_RA_EXT_SENS_DATA_13 0x56#define MPU6050_RA_EXT_SENS_DATA_14 0x57#define MPU6050_RA_EXT_SENS_DATA_15 0x58#define MPU6050_RA_EXT_SENS_DATA_16 0x59#define MPU6050_RA_EXT_SENS_DATA_17 0x5A#define MPU6050_RA_EXT_SENS_DATA_18 0x5B#define MPU6050_RA_EXT_SENS_DATA_19 0x5C#define MPU6050_RA_EXT_SENS_DATA_20 0x5D#define MPU6050_RA_EXT_SENS_DATA_21 0x5E#define MPU6050_RA_EXT_SENS_DATA_22 0x5F#define MPU6050_RA_EXT_SENS_DATA_23 0x60#define MPU6050_RA_MOT_DETECT_STATUS 0x61#define MPU6050_RA_I2C_SLV0_DO 0x63#define MPU6050_RA_I2C_SLV1_DO 0x64#define MPU6050_RA_I2C_SLV2_DO 0x65#define MPU6050_RA_I2C_SLV3_DO 0x66#define MPU6050_RA_I2C_MST_DELAY_CTRL 0x67#define MPU6050_RA_SIGNAL_PATH_RESET 0x68#define MPU6050_RA_MOT_DETECT_CTRL 0x69#define MPU6050_RA_USER_CTRL 0x6A#define MPU6050_RA_PWR_MGMT_1 0x6B#define MPU6050_RA_PWR_MGMT_2 0x6C#define MPU6050_RA_BANK_SEL 0x6D#define MPU6050_RA_MEM_START_ADDR 0x6E#define MPU6050_RA_MEM_R_W 0x6F#define MPU6050_RA_DMP_CFG_1 0x70#define MPU6050_RA_DMP_CFG_2 0x71#define MPU6050_RA_FIFO_COUNTH 0x72#define MPU6050_RA_FIFO_COUNTL 0x73#define MPU6050_RA_FIFO_R_W 0x74#define MPU6050_RA_WHO_AM_I 0x75#define MPU6050_TC_PWR_MODE_BIT 7#define MPU6050_TC_OFFSET_BIT 6#define MPU6050_TC_OFFSET_LENGTH 6#define MPU6050_TC_OTP_BNK_VLD_BIT 0#define MPU6050_VDDIO_LEVEL_VLOGIC 0#define MPU6050_VDDIO_LEVEL_VDD 1#define MPU6050_CFG_EXT_SYNC_SET_BIT 5#define MPU6050_CFG_EXT_SYNC_SET_LENGTH 3#define MPU6050_CFG_DLPF_CFG_BIT 2#define MPU6050_CFG_DLPF_CFG_LENGTH 3#define MPU6050_EXT_SYNC_DISABLED 0x0#define MPU6050_EXT_SYNC_TEMP_OUT_L 0x1#define MPU6050_EXT_SYNC_GYRO_XOUT_L 0x2#define MPU6050_EXT_SYNC_GYRO_YOUT_L 0x3#define MPU6050_EXT_SYNC_GYRO_ZOUT_L 0x4#define MPU6050_EXT_SYNC_ACCEL_XOUT_L 0x5#define MPU6050_EXT_SYNC_ACCEL_YOUT_L 0x6#define MPU6050_EXT_SYNC_ACCEL_ZOUT_L 0x7#define MPU6050_DLPF_BW_256 0x00#define MPU6050_DLPF_BW_188 0x01#define MPU6050_DLPF_BW_98 0x02#define MPU6050_DLPF_BW_42 0x03#define MPU6050_DLPF_BW_20 0x04#define MPU6050_DLPF_BW_10 0x05#define MPU6050_DLPF_BW_5 0x06#define MPU6050_GCONFIG_FS_SEL_BIT 4#define MPU6050_GCONFIG_FS_SEL_LENGTH 2#define MPU6050_GYRO_FS_250 0x00#define MPU6050_GYRO_FS_500 0x01#define MPU6050_GYRO_FS_1000 0x02#define MPU6050_GYRO_FS_2000 0x03#define MPU6050_ACONFIG_XA_ST_BIT 7#define MPU6050_ACONFIG_YA_ST_BIT 6#define MPU6050_ACONFIG_ZA_ST_BIT 5#define MPU6050_ACONFIG_AFS_SEL_BIT 4#define MPU6050_ACONFIG_AFS_SEL_LENGTH 2#define MPU6050_ACONFIG_ACCEL_HPF_BIT 2#define MPU6050_ACONFIG_ACCEL_HPF_LENGTH 3#define MPU6050_DHPF_RESET 0x00#define MPU6050_DHPF_5 0x01#define MPU6050_DHPF_2P5 0x02#define MPU6050_DHPF_1P25 0x03#define MPU6050_DHPF_0P63 0x04#define MPU6050_DHPF_HOLD 0x07#define MPU6050_TEMP_FIFO_EN_BIT 7#define MPU6050_XG_FIFO_EN_BIT 6#define MPU6050_YG_FIFO_EN_BIT 5#define MPU6050_ZG_FIFO_EN_BIT 4#define MPU6050_ACCEL_FIFO_EN_BIT 3#define MPU6050_SLV2_FIFO_EN_BIT 2#define MPU6050_SLV1_FIFO_EN_BIT 1#define MPU6050_SLV0_FIFO_EN_BIT 0#define MPU6050_MULT_MST_EN_BIT 7#define MPU6050_WAIT_FOR_ES_BIT 6#define MPU6050_SLV_3_FIFO_EN_BIT 5#define MPU6050_I2C_MST_P_NSR_BIT
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