BASIC4MCU | ★=STM32_IDE=★ | ST-LINK - J-LINK | SEG-JLINK
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작성자 master 작성일2018-02-19 17:10 조회3,139회 댓글0건본문
SEG-JLINK
Segger J-Link debug probe for STM32With unparalleled performance, extensive feature set, large number of supported MCUs, and compatibility with all popular development environments, the J-Link (SEG-JLINK) debug probes optimize user debugging and flash programming experience.
The on-board ST-LINK included in the STM32 Discovery and Nucleo board kits may be upgraded free of charge with a specific version of the J-Link firmware available on the Segger website http://www.segger.com.ST will not provide any support for this modification, and it is not responsible for any difficulty this may cause.
Key Features
- Up to 3-Mbyte/s download speed to RAM
- Supports an unlimited number of software breakpoints in internal and external Flash memory
- Supports multiple target interfaces (JTAG, SWD)
- Intelligence in the emulator firmware
- Compatible with all popular toolchains
- Support for multi-core debugging
- Cross platform support (Microsoft® Windows® , Linux, OS X® )
- Supports concurrent access to CPU by multiple applications
- Remote Server included, allows using J-Link remotely via TCP/IP
- No charge for software updates
- Software comes with free GDB Server, allowing usage of J-Link with all GDB-based debug solutions
- Production flash programming software(J-Flash) available
- Debugger independent flash download
- Can be connected to the host PC via USB or Ethernet (J-Link PRO)
- No power supply required, powered through USB
- Wide target voltage range: 1.2V - 3.3V, 5V tolerant
- All JTAG signals can be monitored, target voltage can be measured
- Target power supply: J-Link can supply up to 300 mA to target with overload protection
- An SDK allows customized use of J-Link
- Various target adapters and optical isolation adapters available
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SEGGER Debug Probes—J-Link
SEGGER J-Links are the most widely used line of debug probes available today. They've proven their value for more than 10 years in embedded development. This popularity stems from the unparalleled performance, extensive feature set, large number of supported CPUs, and compatibility with all popular development environments.
J-Link — The best choice to optimize your debugging and flash programming experience
With up to 3 MBytes/s download speed to RAM and record-breaking flashloaders, as well as the ability to set an unlimited number of breakpoints in flash memory of MCUs, the J-Link debug probes are undoubtedly the best choice to optimize your debugging and flash programming experience.
J-Link debug probes support ARM 7/9/11, Cortex-M/R/A, Microchip PIC32, Renesas RX CPUs as well as SPI flash devices. Here is the complete list of microcontrollers and SPI flash devices that are supported by J-Link.
The J-Link debug probes are supported by all major IDEs including Eclipse, GDB-based IDEs and SEGGER Embedded Studio. For a complete list, please refer to Supported IDEs.
ResourcesWorking with J-Link
J-Link can be used for programming flash targets with the J-Flash software or stand-alone.
Setting up J-Link for first use
In order to use J-Link for the first time you need to install the J-Link related software and documentation pack which, among others, includes the J-Flash software, and connect J-Link to the host PC via USB.
Connecting the target system
Power-on sequence
In general, J-Link should be powered on before connecting it with the target device. That means you should first connect J-Link with the host system via USB and then connect J-Link with the target device. Power-on the device after you connected J-Link to it.
If you use J-Link PRO with Ethernet, just power-on J-Link via external power supply.Verifying target device connection with J-Link Commander
If the USB driver is working properly and your J-Link is connected with the host system, you may connect J-Link to your target hardware. Then start the J-Link command line tool JLink.exe, which should now display the normal J-Link related information. Now type connect and specify your target, and the target interface. Once done it should display a report about the connected CPU and its debug interface. The screenshot shows the output of JLink.exe. As can be seen, it reports a J-Link connected to an STM32F205 and the related information.
Start using J-Link with your favourite tool-chain.
To connect your J-Link with your development project, please consult the guide for your favourite tool-chain.
Supported IDEs
Full J-Link/J-Trace Support
The following table lists the IDEs fully supporting J-Link/J-Trace and the additional features of J-Link/J-Trace, which can be used with them.
All following IDEs have debug support, including: Download to flash and RAM, memory read/write, CPU register read/write, run control (go, step, halt), software breakpoints in RAM, hardware breakpoints in flash memory, and use of Unlimited Flash Breakpoints.All information are collected to the best of our knowledge and belief. It may be subject to change and my be updated at any time. If you find any false or missing information, feel free to contact us at info@segger.com.
1 Prices are the approximated standard US prices for single user commercial use without code size / time limit. The prices are meant for comparison purposes and may not be up-to-date. For the current price, as well as other options, like evaluation or light versions of the software, please refer to the official website of the software vendor. If you think one of the prices is not accurate enough, feel free to contact us at info@segger.com.
2 Requires emulator with trace support. May not be supported with all devices.
3 May not be supported with all devices. Only available on Cortex-M/A/R devices.
4 Via J-Link SWO viewer (included in J-Link Software pack, no additional cost)Limited J-Link/J-Trace Support
All information are collected to the best of our knowledge and belief. It may be subject to change and may be updated at any time. If you find any false or missing information, feel free to contact us at info@segger.com.
1 Prices are the standard US prices for commercial use without code size / time limit. The prices are meant for comparison purposes and may not be up-to-date. For the current price, as well as other options, like evaluation or light versions of the software, please refer to the official website of the software vendor. If you think one of the prices is not accurate enough, feel free to contact us at info@segger.com.
2 Requires emulator with trace support. May not be supported with all devices.
3 May not be supported with all devices. Only available on Cortex-M/A/R devices.
VCOM Functionality
J-Link comes with built-in virtual COM port (VCOM) functionality. This means that in addition to the regular J-Link debug functionality, J-Link will also show up as a COM port in the device manager of the operating system.
As most modern computers do not expose a physical COM port anymore but many hardware setups still use UARTs for logging, diagnostics and application control, usually a separate COM to USB adapter is needed to use the COM functionality of the target hardware while debugging in parallel.
With J-Link, such an additional adapter is not required as J-Link provides this adaption functionality.
Availability
The VCOM functionality is available on the current hardware version of the following J-Link models:
J-Link models are shipped with VCOM functionality disabled. It can be enabled via the J-Link Configurator utility. For more information about how to enable VCOM on a J-Link, please refer to the J-Link user guide.
Technology
The J-Link VCOM functionality is implemented via SEGGER emUSB-Device, using the CDC-ACM class.
For more information, please refer to the emUSB-Device pages.Pinout
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* On some models like the J-Link ULTRA, these pins are reserved for firmware extension purposes. They can be left open or connected to GND in normal debug environment. Please do not assume them to be connected to GND inside J-Link. Please note that the pins used for UART Tx/Rx are shared with some target interface pins on the J-Link side. This means that VCOM functionality is not available when using target interfaces that make use of these pins. For more information, please refer to the J-Link user guide.
Model Overview
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Technology
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