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BASIC4MCU | ♧ STM32F7 | ◆F7x7 Advanced | F7x7 Advanced

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작성자 master 작성일2018-04-19 10:06 조회2,059회 댓글0건

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STM32F7 Series 


STM32F7 series of very high-performance MCUs with ARM® Cortex®-M7 core

Taking advantage of ST’s ART Accelerator™ as well as an L1 cache, STM32F7 microcontrollers deliver the maximum theoretical performance of the Cortex-M7 core, regardless if code is executed from embedded Flash or external memory: 1082 CoreMark /462 DMIPS at 216 MHz fCPU.

Smart architecture with new peripheral set

The STM32F7 series unleashes the Cortex-M7 core:

  • AXI and multi-AHB bus matrixes for interconnecting core, peripherals and memories
  • Up to 16 Kbytes +16 Kbytes of I-cache and D-cache
  • Up to 2 Mbytes of embedded Flash memory, with Read-While-Write capability on certain devices
  • Two general-purpose DMA controllers and dedicated DMA controllers for Ethernet (on some variants), high-speed USB On-The-Go interfaces and the Chrom-ART graphic accelerator (on some variants)
  • Peripheral speed is independent from CPU speed (dual clock support) allowing system clock changes without any impact on peripheral operations
  • Even more peripherals, such as two serial audio interfaces (SAI) with SPDIF output support, three I²S half-duplex interfaces with SPDIF input support, two USB OTG interfaces with dedicated power supply and Dual-mode Quad-SPI Flash memory interface
  • Large SRAM with a scattered architecture: 
    • Up to 512 Kbytes of universal data memory, including up to 128 Kbytes of Tightly-Coupled Memory for Data (DTCM) for time critical data handling (stack, heap...)
    • 16 Kbytes of Tightly-Coupled Memory for Instructions (ITCM) for time-critical routines
    • 4 Kbytes of backup SRAM to keep data in the lowest power modes
  • Protected code execution feature (PC-ROP) on some variants
  • On-chip USB high-speed PHY on some variants

Power efficiency

  • 7 CoreMark/mW at 1.8 V
  • 100 µA typical current consumption in Stop mode with all context and SRAM saved

Compatibility

  • Cortex-M7 is backwards compatible with the Cortex-M4 instruction set
  • STM32F7 series is pin-to-pin compatible with the STM32F4 series*

* Note: see datasheet for the specific case of 64- and 100-pin packages

149fab2a955c5de460a27f8e38504fba_1524099706_4736.jpg
 






STM32F7x7 Advanced 


The STM32F767/777 lines offer the performance of the Cortex-M7 core (with double-precision floating point unit) running up to 216 MHz while reaching similar lower static power consumption (Stop mode) versus the STM32F427/429/437/439 lines.

  • Performance: At 216 MHz fCPU, the STM32F767/777 lines deliver 1082 CoreMark /462 DMIPS performance executing from Flash memory, with 0-wait states thanks to ST’s ART Accelerator. The DSP instructions and the floating point unit enlarge the range of addressable applications. External memory can be used with no performance penalty thanks to the L1 cache (I/D 16 Kbytes + 16 Kbytes).
  • Power efficiency: ST’s 90 nm process, ART Accelerator and dynamic power scaling enables the power consumption in Run mode and executing from Flash memory to be at 7 CoreMark / mW at 1.8 V. In Stop mode, power consumption is typically 100 µA, which is similar to the STM32F427/429/437/439 lines.
  • Graphics: The new LCD-TFT controller interface with dual-layer support takes advantage of the Chrom‑ART Accelerator™. This graphics accelerator creates content twice as fast as the core alone. As well as efficient 2-D raw data copy, additional functions are supported by the Chrom-ART Accelerator such as image format conversion or image blending (image mixing with some transparency). As a result, the Chrom-ART Accelerator boosts graphics content creation and saves the processing bandwidth of the MCU core for the rest of the application. In addition the STM32F767/777 lines embed a JPEG hardware accelerator for fast JPEG encoding and decoding off-loading the CPU which remains available for other tasks.
  • Integration:
    • Audio: Two dedicated audio PLLs, three half-duplex I²S interfaces, a new serial audio interface (SAI) supporting time-division multiplex (TDM) mode and a DFSDM (Digital filters for sigma-delta modulators or MEMS microphone)
    • Up to 28 communication interfaces including four USARTs in addition to four UARTs running at up to 12.5 Mbit/s, six SPIs running at up to 50 Mbit/s, four I²C interfaces with a new optional digital filter capability, three CAN, two SDIO, USB 2.0 full-speed device/host/OTG controller with an on-chip PHY and a USB 2.0 high-speed/full-speed device/host/OTG controller, on-chip full-speed PHY and ULPI, Ethernet MAC, SPDIF-IN, HDMI-CEC, and MDIO slave.
    • Analog: Two 12-bit DACs, three 12-bit ADCs reaching 2.4 or 7.2 MSPS in Interleaved mode. Up to 18 timers: 16- and 32-bit running at up to 216 MHz. Easily extendable memory range using the flexible memory controller with 32-bit parallel interface, and supporting Compact Flash, SRAM, PSRAM, NOR, NAND and SDRAM memories or using the Dual-mode Quad-SPI to allow code execution from external serial Flash memory. An analog true random number generator.

The STM32F777 line integrates a crypto/hash processor providing hardware acceleration for AES-128, -192 and -256 encryption, with support for GCM and CCM, Triple DES, and hash (MD5, SHA-1 and SHA-2) algorithms.

The STM32F767 and STM32F777 portfolio provides from 1 to 2 Mbytes of Flash memory, 512-Kbyte SRAM including up to 128 Kbytes of Tightly-Coupled Memory for Data (DTCM), 16-Kbyte ITCM RAM, 4-Kbyte Backup RAM and 100- to 216-pin packages.

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