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BASIC4MCU > ♧ STM32L4

◆L4x5 USB OTG | L4x5 USB OTG

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작성자 master 작성일18-04-23 09:24 조회1,812회 댓글0건

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STM32L4 Series  


STM32L4 series of ultra-low-power MCUs

ST has built a new architecture to reach best-in-class ultra-low-power figures thanks to its high flexibility. STM32L4 MCUs have scored 253 in the standardized EEMBC™ ULPBench® tests that compare the efficiency of ultra-low-power microcontrollers. Moreover, the STM32L4 series shatters performance limits in the ultra-low-power world. It delivers 100 DMIPS based on its Arm® Cortex®-M4 core with FPU and ST ART Accelerator™ at 80 MHz.

STM32L4 microcontrollers offer dynamic voltage scaling to balance power consumption with processing demand, low-power peripherals (LP UART, LP timers) available in Stop mode, safety and security features, smart and numerous peripherals, advanced and low-power analog peripherals such as op amps, comparators, LCD, 12-bit DACs and 16-bit ADCs (hardware oversampling).

The series are available in different lines: STM32L4x1 (Access line), STM32L4x2 (USB Device), STM32L4x3 (USB Device, LCD), STM32L4x5 (USB OTG) and STM32L4x6 (USB OTG, LCD).

To simplify migration and give you all the flexibility you need, the STM32L4 is pin-to-pin compatible with the different STM32 series and opens the door to the full STM32 ecosystem.

  • Ultra-low-power mode: 8 nA with backup registers without real-time clock (5 wakeup pins)
  • Ultra-low-power mode + RTC: 200 nA with backup registers (5 wakeup pins)
  • Ultra-low-power mode + 16 Kbytes of RAM: 200 nA
  • Ultra-low-power mode + 16 Kbytes of RAM + RTC: 450 nA
  • Dynamic run mode: down to 36 μA/MHz
  • Wake-up time: 5 μs

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STM32L4x5 USB OTG 


STM32L4 series of ultra-low-power and performance MCUs

STM32L475 device extend the ultra-low-power portfolio and performance with an ARM® Cortex®-M4 core with DSP and floating-point unit (FPU) at 80 MHz.

The STM32L475 portfolio offers from 256 Kbytes to 1 Mbyte of Flash and from 64- to 100-pin packages. Its memory range can easily be extended using SDIO, Quad-SPI and FSMC interfaces.

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